AI-agent MCP server for FPGA design: compile, validate & generate Verilog from C⏚ HDL.
Connect Runs on your machine
claude mcp add neosyn-fpga-mcp -e CG_JAR=<CG_JAR> -- uvx neosyn-fpga-mcp==1.4.0
{
"mcpServers": {
"neosyn-fpga-mcp": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp==1.4.0"
],
"env": {
"CG_JAR": "<CG_JAR>"
}
}
}
}
{
"mcpServers": {
"neosyn-fpga-mcp": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp==1.4.0"
],
"env": {
"CG_JAR": "<CG_JAR>"
}
}
}
}
{
"servers": {
"neosyn-fpga-mcp": {
"type": "stdio",
"command": "uvx",
"args": [
"neosyn-fpga-mcp==1.4.0"
],
"env": {
"CG_JAR": "<CG_JAR>"
}
}
}
}
Replace the values in angle brackets with your own. Keys stay on your machine; we never see them.
Tools
This server runs locally, so its tools are listed by your MCP client once it starts.
Environment variables
| Name | Description |
|---|---|
CG_JAROptional | Path to the C⏚ compiler jar (cg-language-server.jar). Download the prebuilt jar from the cg-compiler GitHub releases. |
Details
| Package | [email protected] (PYPI, stdio) |
| First published | 30 Sep 2026 |
| Last updated | 30 Sep 2026 |
| Registry name | io.neosyn/neosyn-fpga-mcp |
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